As the semiconductor devices keeps scaling down in size, three-dimensional multi-gate structures, such as the fin-type field effect transistor (FinFET), have been developed to replace planar Complementary Metal Oxide Semiconductor (CMOS) devices. A structural feature of the FinFET is the silicon-based fin that extends upright from the surface of the substrate, and the gate wrapping around the conducting channel that is formed by the fin further provides a better electrical control over the channel.
Currently, voids are often found in high-aspect-ratio shallow trench isolation (STI) structures of FinFETs. The aforesaid voids found in high-aspect-ratio STI structures may deteriorate reliability and yield rate of FinFETs.